Electronic postage meters generally comprise an accounting unit with a microprocessor and a non-volatile memory for storing the accounting data. Such a meter is disclosed, for example, in the U.S. patent application Ser. No. 089,413, filed Oct. 30, 1979 now U.S. Pat. No. 4,301,507 and assigned to the assignee of the present application. In this system, the accounting data is stored in the random access memory and retrieved from the random access memory by way of common address and data lines of the microcomputer system. While in most instances it can be assured that the accounting data stored in the memory will be correct, there are certain conditions that can occur that can result in non-detectable errors in the data.
In order to overcome such problems, it has been proposed to employ redundant memories. The microprocessor program for the postal meter thus includes a subroutine for comparing the data stored in the redundant memories to provide an indication of error if the stored data in the two memories is different. While this technique increases the reliability of the stored data, there are certain conditions in which even this type of redundant system will not enable the determination of an error. It must be emphasized that in a postage meter it is critically important that the highest degree of reliability of accounting data be obtained.
In U.S. Pat. No. 4,481,604, for example, a postage meter is described which utilizes dual battery accessed memories (BAMS). The BAMS are utilized as non-volatile memories. In these patents the memories have a battery connected thereto to provide a power source to retain the data in the memory when normal power is removed from the postage meter.
It has also been disclosed, for example, in U.S. patent application Ser. No. 343,877, filed on Jan. 29, 1982 now abandoned and assigned to the assignee of the present application that there are other means for minimizing the possibility of error conditions in an electronic postage meter. Thus, in the above application the two redundant memories are interconnected with the processor, i.e., the microcomputer bus by entirely separate groups of data and address lines. As a result of the complete separation of the addressing and data, various error conditions, such as the shorting of a pair of address lines, will not result in the erroneous addressing of both of the memories. Accordingly, under such conditions, the shorting of a pair of address lines will not result in the storage of the same data in both of the memories, so that a comparison of stored data will result in a detection of the error condition.
In accordance with a further embodiment of the above application, corresponding data is applied redundantly to the redundant memories at different times. This may be effected by separately applying the data sequentially to the two memories. Alternatively, data may be simultaneously applied from the two memories, with the data transferred at any instant with respect to the two memories corresponding to different information. As a result, instantaneously occurring transients on the transmission lines will not be likely to effect the corresponding data stored in the two memories in the same fashion. This system thereby minimizes the possibility of non-detectable and/or non-correctable errors resulting from the transients.
While the above identified invention described in the patent application performs its function in exemplary fashion, it is always important to further provide means for protecting the information within an electronic postal mailing system. It is important to develop new and more efficient techniques to minimize these errors because of the information located in the postal non-volatile memories of the meter are postal funds which a consumer has inserted into the meter.
Thus, it is important to develop within a postage meter a circuitry that will further protect the critical accounting information within those non-volatile memories from being effected. It is important that there be a circuitry not only to protect the meter from the possibility of transients effecting the non-volatile memories in an alternative fashion, but there is always a need to prevent any unauthorized signals from entering the memories.
It had been found that random signals, as above described, can enter the memories and thereby destroy information located therein. Thus, it is important that means and ways be developed to prevent those signals, transients or the like from reaching the memory.